1. Field of the Invention
The invention relates to computer systems. More specifically, the invention relates to access initialization data stored in a non-volatile memory of a computer system.
2. Description of the Related Art
As electronic and information technology progress rapidly, more powerful, high performance and innovative peripherals for Personal Computer (PC) are available to the market. With the functionality of peripherals becomes more complicated, PC vendors tend to design PC with simpler architectures in order to have simpler circuit layouts and lower costs. Therefore, the chipset, which integrates separated logic for different functions into one chip, is designed to meet the requirement of the simplified PC architectures. Nowadays, chipsets have helped to simplify PCs' layout as well as make more space on the circuit boards of the PCs.
Referring now to FIG. 1, a conventional personal computer system is shown with components, including so-called “north bridge” and “south bridge” chipsets, in block diagram form. The various components and buses are typically formed on a main board or mother board. A personal computer system typically contains one central processing unit (CPU) 104, cache memory 106 and Dynamic Random Access Memory (DRAM) 108. The CPU 104, cache memory 106 and DRAM 108 are connected to a north bridge 102. A power supply controller 112, keyboard/mouse 114 and a boot Read-Only Memory (ROM) 116, which stores a basic input/output system (BIOS) are connected to the south bridge 110. The peripheral bus 100, such as the conventional Peripheral Component Interconnect (PCI) bus, which a number of peripherals that meet the PCI specification can be connected to, is connected to both the south bridge 110 and north bridge 102. Both the north bridge 102 and the south bridge 110 connect to and/or control the devices or peripherals working with different bandwidth and performance requirements. The north bridge 102 is designed closer to the CPU 104 so that it is used to connect to the components and/or peripherals with high bandwidth and system performance requirements, such as a DRAM 108. On the other hand, the south bridge 110 is utilized to connect lower bandwidth peripherals such as the keyboard/mouse 114.
During a conventional computer system booting procedure, the CPU sets initial values for certain parameters to be transferred through the north bridge and south bridge for initialization. The data for setting the initial values in the beginning of booting are called the initialization data. The initialization data are not included in the BIOS which is stored in the boot ROM, and they depend on the CPU that a computer system adopted. For example, the initialization data may include serial initialization packet (“SIP”) data used in PCs using CPUs manufactured by Advanced Micro Devices (AMD) incorporation.
For these reasons, two conventional approaches, namely, strapping and jumping are used to set the initialization data. Strapping refers to using fixed connections of circuit to set the data, while jumping means using jumpers for an user to short two pins from a set of pins for data setting. If a few numbers of initialization data are to be set, it is suitable to set these data through hardware connections such as strapping and jumping. However, costs of applying these two approaches will increase when more initialization data are necessary to be set.
Referring now to FIG. 2, a conventional computer system is shown in block diagram form. In this design, a serial Programmable Read-Only Memory (serial PROM) 200 is included in the computer system and is utilized to store the initialization data mentioned above. The initialization data for this computer system take up about 34-byte memory space of the serial PROM. By this approach, a number of strapping and jumping for setting the initialization data are omitted.
In FIG. 2, a serial PROM 200 is connected to the north bridge 204 by two input/output ports 202 of the north bridge 204. When the computer system is powered on, the south bridge 206 is powered and sends a signal to start up the north bridge 204. After the north bridge 204 has started up, it sends a clock-like signal to the serial PROM 200 and then reads the initialization data stored in the serial PROM 200. Finally, the CPU 208 starts up and then operates normally after the CPU 208 sets its initial values for initialization using the initialization data sent by the north bridge 204.
The computer system illustrated by FIG. 2 overcomes the drawback of applying strapping or jumping approaches to setting initialization data in the conventional computer system. However, when it comes to mass production, this approach is expensive due to the use of the serial PROM, additional ports and logic for connecting the serial PROM, and necessary design modification on the north bridge.